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hevangel

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Everything posted by hevangel

  1. In p.433 of the UVM class reference manaul, sequence.kill() refers to a sequencer.unregister_sequence() method. Where is the unregister_sequence() method? It is not in the sequencer API? Horace
  2. Hi, I would like to report a typo in the UVM class reference manual. P.748 get_uvmargs This function returns a queue with all of the uvm arguments that were used to start the simulation. A UVM argument is taken to be any argument that starts with a - or + and uses the keyword UVM (case insensitive) as the first three letters of the argument. get_uvmargs should be get_uvm_args, missing a _ Horace
  3. hevangel

    build_phase order

    Thanks for the explaination. I hope Accellera would clean it up in the IEEE-UVM standard to avoid having ambigious build order.
  4. Hi, I notice something interesting in the build_phase order of uvm_component. The uvm_component at the same level are build in the alphabetatical order of the instance name. I expect the build order would be the same as the order I call the factory create function. I am wondering is the alphabetatical build order an intended feature of UVM or just some artifact of the implementation? I couldn't find any reference to this behavior in the UVM user guide or the class reference library. Thanks. Horace
  5. If you are using Cadence, try change "program test" to "module test" and see whether it solve your problem. I encountered SV threads scheduling issues when mixing class inside a program and sequence.get_next_item() in a module.
  6. To make uvm_random_stimulus useful, I think UVM should add a pull port to this class. The whole sequence/sequencer concept is based on pulls from the driver, uvm_random_stimulus does not fit well within this picture.
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