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  1. You can use sc_vector and its various helpers and assemble and dis-assemble vectors. regards Alan
  2. Hi, the reason for the error is that you're not binding all your ports. You bind the ports in this loop: for(int i=0;i<n;i++) { for (int j=0;j<=i;j++) { std::cout << i << " " << j << " " << std::endl; test_CHOL0->chol_in_data[i][j](chol_in_data[i][j]); test_CHOL0->chol_out_data[i][j](chol_out_data[i][j]); } } but in the second loop you have j <= i. I've added printing and you can see that you only bind 6 of the 9 ports SystemC 2.3.1-Accellera --- Sep 3 2016 13:00:03 Copyright (c) 1996-2014 by all Contributors, ALL RIGHTS RESERVED 0 0 1 0 1 1 2 0 2 1 2 2 I think you need j < n regards Alan
  3. I guess first you'd need to add an attribute (extension) to the generic payload to represent the priority. Then you could write a variant of the PEQ which takes into account that priority. regards Alan
  4. For that kind of modelling you probably need resolved types, e.g. sc_signal_resolved, sc_in/out resolved. These types model signal strength resolution, i.e. if you drive two values such as '1' and 'Z', '1' will be the resulting value because '1' is stronger than 'Z'. Have a look at the SystemC standard 1666-2011, especially section 6.13.5 where there's a little example that might help, regards Alan
  5. Could you post your code? regards Alan
  6. Have a look at this thread regards Alan
  7. Hi Jean-Claude, one option would be to create an a process sensitive to each event, and then in that process assign (or perhaps toggle the value) of an sc_signal<bool>. You can then make a process sensitive to all the boolean signals, and find out which signal changed by calling the signal's event method. It's a bit messy, but it would work. You could combine the process, the event, and the boolean signal into a hierarchical channel (perhaps using sc_event_queue for guidance), regards Alan
  8. Hi, your approach seems odd to me. If I were you, I would re-write the C++ model to be more synthesisable. I would go back to your HLS vendor and say "what do I need to do to my algorithmic model to get good results? You seem to be taking the approach of using HLS, then re-writing the generated RTL code, which sounds like a very long-winded design flow, regards Alan
  9. It's not apparent what type mod_name and reg_name are. But if they're the SV string data type, you can use mod_name.to_lower(), Alan
  10. Ok, as Roman says above, it's hard to help without the source code. This might be obvious, but if you can't post the code, I would try the following 1. Try the same code on a different compiler and/or OS 2. Try to narrow down exactly what line of code is causing the problem by commenting out code until the problem disappears 3. Try setting breakpoints progressively further in the simulation until you can set a breakpoint just before the failure regards Alan
  11. You can't concatenate ports like that - the concatenation operator is not defined for ports, it's defined for data types such as sc_uint, sc_bv, sc_lv. The best solution is probably (as you hint) to introduce a separate SC_METHOD. If you don't want to use a separate SC_METHOD, you might be able to do what you want using sc_vector - good luck! Alan
  12. Ah, that's not a SystemC or C++ error, that's an Eclipse error - you might have to post to an Eclipse forum or hope that someone here uses Eclipse. Or try Google, which finds this: http://stackoverflow.com/questions/8148235/eclipse-cdt-shows-semantic-errors-but-compilation-is-ok regard Alan
  13. Please can you post the syntax error? thanks Alan
  14. I'm not sure, but try moving -luvm-systemc before -lsystemc Alan
  15. The error message implies that you are calling wait() in your SC_METHOD - that's not allowed, wait() can only be called in SC_THREADS, regards Alan