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Rashmi11

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  1. Hi All , I am trying to copy a particular bit from one bit vector to other . I tried several ways of assigning the values but could not get it right. Also ,I want to assign a variable 'i' to a constant value in the loop . Below is the code . I have highlighted the lines where I am getting error. I would really appreciate if anyone could help in this . Thank you. #include "systemc.h" SC_MODULE(S_R){ sc_in <bool> clk; sc_in < sc_bv<8> > din; sc_in <bool> rst; sc_out< sc_bv<8> > dout; sc_in<bool> load; sc_bv<8> dinp; sc_int<1> i ; void shift() { if(rst) { dout=0; } else if(load) { dinp=din; i.write('0'); dout[0].write(dinp[7]); cout<<sc_time_stamp()<<"\tDESIGN1 --> input data:"<<dinp<<"\toutput data:"<<dout<<"\n"; } else { dinp=dinp<<1; dout.write(dinp[7]); i=i+1; cout<<sc_time_stamp()<<"\tDESIGN --> input data:"<<dinp<<"\toutput data:"<<dout<<"\n"; } } SC_CTOR(S_R) { SC_METHOD(shift); sensitive<<clk.pos(); } };
  2. Hi All , I am new to SytemC and I am designing a FIFO . When I run the make file I am getting an error " no match for ‘operator=’ in ‘((sync_fifo*)this)->sync_fifo::wptr = 0’ " . I guess this has do with the sensitivity list of wptr and rptr but I am not sure how to fix it.I have highlighted the lines where I am getting error . It will be really helpful if someone could explain this . Thank you #include <systemc.h> SC_MODULE (sync_fifo){ sc_in_clk clk; sc_in<bool> rst; sc_in<bool> rd_wr; sc_out<bool> full; sc_out<bool> empty; sc_in < sc_uint<8> > data_in; sc_in < sc_uint<4> > wptr; sc_in < sc_uint <4> > rptr; sc_out < sc_uint<8> > data_out; sc_uint<8> ram_data[256]; void read_write() { if(rst == 1) { wptr=0;rptr=0;data_out=0; } else if(rd_wr == 1 && !full) { ram_data[wptr.read()]=data_in; wptr=wptr+1; } else if(rd_wr == 0 && !full) { data_out=ram_data[rptr.read()]; rptr=rptr+1; } } void emp_ful(){ if(rst == 1) { full=0; empty=0; } else { if(wptr == rptr ) { empty=1; } else if((wptr - rptr) == 15) { full=1; } else { full=empty=0; } } } SC_CTOR(sync_fifo) { SC_METHOD(read_write); sensitive << clk.pos() << rst ; sensitive << wptr ; sensitive << rptr; SC_METHOD(emp_ful); sensitive << clk.pos() << rst ; sensitive << wptr ; sensitive << rptr ; } };
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