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Giuli0

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Giuli0 last won the day on August 12 2014

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About Giuli0

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  1. Submodule synchronization

    Hi Ralph, thanks for your reply. Actually, I fixed the problem using a delay module. I agree with what you said, but in my case, I am integrating a pre existing project with no clock, and i preferred to keep everything as close as possible to the initial interface. Now it works.
  2. So, I am still working on this memory code, and I am still having troubles... The memory module has some submodules: a decoder, and a sc_vector containing mem_cell modules. The mem_cell has two input ports: datain, and address_enable. Address_enable is connected to the output port of the decoder, while datain is directly connected to the datain port of the memory upper level module. According to my design, mem_cell is sensitive to both address_enable and datain. My problem is that this signals have different path lengths: address_enable, receiving its value from the decoder, needs an extra delta-cycle to get updated, compared to the datain signal, which comes directly from the memory port. So, when testing, I get unexpected results. I think there must be a simple and effective way to synchronize everything. Would it be correct to put some "delay modules" along the fastest paths, in order to synchronize? Are there any other soulutions? I think I shouldn't modify the submodules, which are neat and already succesfully tested.
  3. Channel vs port value update

    Hello Ralph, I was trying and answering to Karthick and I didn't see your answer. After reading it, I guess I was right. ThreadA and threadB are connected through a signal. ThreadA writes on the signal during its delta numb1, and this value will be seen by threadB only during its delta number2. Right? Thanks you both Karthick and Ralph!
  4. Channel vs port value update

    Thanks Karthick, now it works, but I am not sure why! Using you suggestion, generally speaking I think that the mechanism works like this: If I write something in threadA during delta number 1, it will only be available in threadB during delta num2. And if deltaB writes something during its delta num2, threadA has to wait delta num3 in order to read it. This is why the stimulus thread needs 2 wait(SC_ZERO_TIME) statements in order to read the correct output from the memory, because it has to forward its delta value. Am I right? And if all of this is right, what could be a more reccomended solution, instead of using two wait statements?
  5. Hello everybody, While working on a systemC project, I discovered that probably I have some confused ideas about signals and ports. Let's say I have something like this: //cell.hpp SC_MODULE(Cell) { sc_in<sc_uint<16> > datain; sc_in<sc_uint<1> > addr_en; sc_in<sc_uint<1> > enable; sc_out<sc_uint<16> > dataout; SC_CTOR(Cell) { SC_THREAD(memory_cell); sensitive << enable << datain << addr_en; } private: void memory_cell(); }; //cell.cpp void Cell::memory_cell() { unsigned short data_cell=11; while(true) { //wait for some input wait(); if (enable->read()==1 && addr_en->read()==1) { data_cell=datain->read(); } else { if(enable->read()==0 && addr_en->read()==1) { dataout->write(data_cell); } } } } //test.cpp SC_MODULE(TestBench) { sc_signal<sc_uint<1> > address_en_s; sc_signal<sc_uint<16> > datain_s; sc_signal<sc_uint<1> > enable_s; sc_signal<sc_uint<16> > dataout_s; Cell cella; SC_CTOR(TestBench) : cella("cella") { // Binding cella.addr_en(address_en_s); cella.datain(datain_s); cella.enable(enable_s); cella.dataout(dataout_s); SC_THREAD(stimulus_thread); } private: void stimulus_thread() { //write a value: datain_s.write(81); address_en_s.write(1); enable_s.write(1); wait(SC_ZERO_TIME); //read what we have written: enable_s.write(0); address_en_s.write(1); wait(SC_ZERO_TIME); cout << "Output value: " << dataout_s.read() << endl; //let's cycle the memory again: address_en_s.write(0); wait(SC_ZERO_TIME); cout << "Output value: " << dataout_s.read() << endl; } }; I've tried running this modules and I've noticed something weird (at least, weird for me): when the stimulus writes a value (81), after the wait(SC_ZERO_TIME) the memory thread finds its datain, enable and address_enable values already updated. This is what I expected to happen. The same happens when the stimulus changes the enable_es value, in order to run another cycle in the memory thread and copy the datacell value into the memory cell dataout port. What I don't understand is why after the memory module writes into its dataout port and goes again to the wait() statement at the beginning of the while loop, the stimulus module still has the old value on its dataout_s channel (0), and not the new value(81), which has just been copied by the memory module. Then, if I run another cycle of the memory loop (for example changing some values on the stimulus channels), the dataout channel finnally updates. In other words, it looks like that if I write into the stimulus channels and then switch to the memory thread, the memory finds the values updated. But if the memory thread writes into its ports, and then i switch to the stimulus thread, the thread still sees the old values on its channels (binded to the memory ports). I don't know if I am clear, and I am sure that maybe this is a naive question, but i am a newbie with systemC and I need to understand this thing.
  6. simulating time delays in SystemC

    So, do you think that one solution could be for the memory_thread to notify another process waiting for it, and this one to notify back to the memory_thread, after the delay? Or maybe doing something better without using a third process, but still using these commands: event_name.notify(mem_delay) and wait(event_name)?
  7. simulating time delays in SystemC

    So, do you think that one solution could be for the memory_thread to notify another process waiting for it, and this one to notify back to the memory_thread, after the delay? Or maybe doing something better without using a third process, but still using these commands: event_name.notify(mem_delay) and wait(event_name)?
  8. Hello! I am working on a SystemC project which has 2 different modules interacting through ports and channels. Both modules are running SC_THREADS. Now, I am having problems using the wait(sc_time) statement. What I want to do is simply to let the time flow (simulated systemC time) while I am inside one thread, without removing the process from the runnable set and without allowing another thread to resume (which happens if I use wait(sc_time)). I want to stay inside the thread, and I want the thread to "take some time" to execute. i need to to this because I am simulating a ram memory, and I want the memory_thread to take some time to execute, in order to emulate memory access delay. How can I do it?
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