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Everything posted by kock

  1. Purpose of modifiedWriteValue = oneToSet?

    Hi Michael, My understand is that oneToSet also means that writing a 0 has no effect. Best regards, Erwin
  2. IP-XACT : "testable" and "testConstraint"

    Hello Jamal, The term simple automated register test is not defined in the standard. I agree with you that it should have been defined. Currently, it is open for different interpretations but in the context of IP-XACT I would say that a field is testable if and only if its IP-XACT metadata contains sufficient information to automatically generate tests for it that prove or disprove the correctness of that field metadata if you would apply those tests on a register implementation. However, this is just my own interpretation. I do not know to what extend the UVM built-in register test adhere to this interpretation assuming you generate the UVM register model from the IP-XACT register description. Best regards, Erwin
  3. IP-XACT : "testable" and "testConstraint"

    Hi Jamal, The IEEE 1685-2014 standard says: testable (optional; type: boolean) defines if the field is testable by a simple automated register test. If this is not present, testable is presumed to be true. testConstraint (optional; type: string; default: unConstrained) attribute defines the constraint for the field during a simple automated register test. unConstrained indicates there are no restrictions on the data that may be written or read from the field. restore indicates the field’s value shall be restored to the original value before accessing another register. writeAsRead indicates the field shall be written only to a alue just previously read from the field. readOnly indicates the field shall be only read. Not sure if this is what you are looking for. You can download the standard through the Accellera website. best regards, Erwin
  4. Hello Justin, Yes, this is the way it should be done. Best regards, Erwin
  5. Duplicated schema tags

    Hello, In case of viewRef, it may be that the different definitions can be factored out into a single definition. I agree with you that it would have been cleaner to have a single definition rather than duplicating the same definition multiple times. However, for accessHandles and ports there are really different definitions. A port in an abstractionDefinition is different from a port in a component. Hence, your translation to Python classes should include some use of scopes or namespaces. Best regards, Erwin
  6. Hi Justin, Sorry for my delayed response. The IP-XACT IEEE 1685-2014 contains Semantic Consistency Rule 1.2 (anyVLNVRefMustExist): Any VLNV in an IP-XACT document used to reference another IP-XACT document shall precisely match the identifying VLNV of an existing IP-XACT document. In the schema, such references always use the attribute group versionedIdentifier. So the standard defines that the component XML files of your sub-modules must exist if your instantiate them in a design. If you are only interested in managing the VLNVs, you can also consider using an IP-XACT catalog (new in IEEE 1685-2014). Best regards, Erwin
  7. Hello Justin, I do not know of freely available TGI implementations. There are commercial implementations available from IP-XACT EDA vendors. Best regards, Erwin
  8. Hi Justin, A design describes the instances and configuration of the sub-IPs and their interconnect. As you mention, these sub-IPs need to be described in IP-XACT. So this is not an appropriate way to handle sub-IPs not described in IP-XACT. I think the answer to your question depends on what you mean with "track". If you just want to track files of sub-IPs you can describe them in file sets of IP_A. Or you can describe sub-IPs in XML containing file sets only. So you can explain your goal a bit more? Thanks, Erwin
  9. Hi Ashwin, The Accellera standardization committee does not have a published guideline for this. Please check with your IP-XACT EDA vendor for a dedicated solution. Best regards, Erwin
  10. Hello Kenny, Indeed you found an inconsistency. The clockInterfaceRef and resetInterfaceRef are not part of the schema. The text should also be removed from the specification document. If you do not want to connect clock and reset ports using the addressable bus interface you can use the isInformative element in the portMap element. This allows you to make clock and reset ports part of the portMaps to get a reference for the other ports without physically connecting them through this interface. The clock and reset port itself can be mapped again in other dedicated clock and reset bus interface in order to create the physical connections. Best regards, Erwin
  11. Leon2 for 1685-2009

    Hi Eirik, Please send me an email (erwin.de.kock at nxp.com). Best regards, Erwin
  12. IP-XACT ralf file generation issue

    Hello Harsh, This is not a tool forum, but it seems that the IP-XACT XML file that you provide as argument is not valid because it does not contain a memoryMaps element. I cannot see the details because the attached XLSX file does not contain the XML file details. Best regards, Erwin
  13. Hi Tudor, The errata have been updated and your comments posted in this forum have been added. The new version is available at http://www.accellera.org/images/downloads/standards/ip-xact/IPXACT-2014-errata-2.pdf Thanks for your contributions, Erwin
  14. Hi Kenny, Yes, IEEE 1685-2014 supports RTL and TLM views in a single file. Please read this topic http://forums.accellera.org/topic/5070-views-in-a-componentmodel/ were the question was asked before. Best regards, Erwin
  15. Yes, indeed. People in the IP-XACT technical committee have noticed this too. We will add it to the errata: http://www.accellera.org/images/downloads/standards/ip-xact/IPXACT-2014-errata.pdf Thanks, Erwin
  16. Hello Gregoire, Thanks for addressing this topic. I think it is better to discuss it over the phone in a special interest meeting of the IP-XACT Technical Committee rather than have discussion in this forum. I will propose this in the next TC meeting. If we come to agreement then we can post the outcome here. Best regards, Erwin
  17. view with multiple configuration

    Hi, I am not sure to understand the problem but it seems that you need 4 views to describe all possible componentInstantiation/designConfigurationInstantiation pairs. Does that make sense? Erwin
  18. Views in a component.model

    Hello Jorge, Yes it is possible to describe RTL and TLM within the same component using two different views. The motivation to have more than one view is that you can describe multiple implementations of an IP in the same IP-XACT component. The way to indicate if a port is present is a particular view is to use the wireTypeDefs (for wire ports) and transTypeDefs (for transactional ports). Each wireTypeDef and each transTypeDef contains zero or more viewRef elements. If there are zero viewRef elements then the type applies to all views (implying that the port is present is all views). If there are one or more viewRef elements then the type applies only to the views specified by the viewRef elements (implying that the port is not present in the views that are not specified). If a port does not have wireTypeDefs or transTypeDefs then the default type applies to all views (implying that the port is present in all views). I must admit that this is not very well described in the IEEE 1685-2014 document in Sections 6.12.9 and 6.12.19. Best regards, Erwin
  19. IP-XACT 2014 vs 2009 differences

    Hello Fred, Unfortunately there is no such document. Best regards, Erwin
  20. IEEE 1685-2014 what is Design Instance

    Hello Sachin, A designInstanceID is a handle to an instance of a design. As you mentioned, a designInstantiation has a designRef with configurable elements. The designRef and its configurable element values define an instance of the referenced design. You can get a handle to this design instance by apply the function getDesignInstantiationDesignInstanceID to the designInstantiation. You can apply the TGI function getUnconfiguredID on the retrieved designInstanceID to get the designID that matches with the designRef VLNV. Best regards, Erwin
  21. How to represent a c++ object ?

    Hi Emna, I am not sure that I understand you. You speak of c++ objects. In IP-XACT you cannot make references to c++ objects. You can only reference files. Furthermore, you can specify the sc_module name in a view. You can also make multiple views. So in the example above, you can make two views: <spirit:views> <spirit:view> <spirit:name>TLM</spirit:name> <spirit:envIdentifier>*:*:*</spirit:envIdentifier> <spirit:language>systemc</spirit:language> <spirit:modelName>tlmip</spirit:modelName> <spirit:fileSetRef> <spirit:localName>TLM</spirit:localName> </spirit:fileSetRef> </spirit:view> <spirit:view> <spirit:name>TLM-AT</spirit:name> <spirit:envIdentifier>*:*:*</spirit:envIdentifier> <spirit:language>systemc</spirit:language> <spirit:modelName>tlmip_at</spirit:modelName> <spirit:fileSetRef> <spirit:localName>TLM-AT</spirit:localName> </spirit:fileSetRef> </spirit:view> </spirit:views> The view named TLM contains modelName tlmip meaning that the sc_module is named tlmip (defined in the file tlmip.cpp). The view named TLM-AT contains modelName tlmip_at meaning that the sc_module is named tlmip_at (for instance defined in another file tlmipat.cpp in an additional fileSet TLM-AT. When you have two instances of this component, let's say u0 and u1, you can choose the view for each instance in the IP-XACT design configuration XML file. E.g.: <spirit:viewConfiguration> <spirit:instanceName>u0</spirit:instanceName> <spirit:viewName>TLM</spirit:viewName> </spirit:viewConfiguration> <spirit:viewConfiguration> <spirit:instanceName>u1</spirit:instanceName> <spirit:viewName>TLM-AT</spirit:viewName> </spirit:viewConfiguration> This will tell your SystemC netlister that it needs to instantiate u0 as tlmip and u1 as tlmip_at. Also you can derive that you will need to compile both files tlmip.cpp and tlmipat.cpp. Best regards, Erwin
  22. How to represent a c++ object ?

    Hi, In IP-XACT, you can reference a file that contains the c++ code. The XML file below defines a component tlmip which contains a view named TLM. That view references a fileSet named TLM. The two files in that fileSet are supposed to implement the TLM view. If you instantiate this component tlmip and you set the TLM view for that instance, then you can derive that you need to compile the tlmip.cpp file and that you need the include file tlmip.h for that. Best regards, Erwin <?xml version="1.0" encoding="UTF-8" standalone="yes"?> <spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009 http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd"> <spirit:vendor>nxp.com</spirit:vendor> <spirit:library>dp</spirit:library> <spirit:name>tlmip</spirit:name> <spirit:version>1.0</spirit:version> <spirit:busInterfaces> <spirit:busInterface> <spirit:name>TLM_Slave</spirit:name> <spirit:busType spirit:version="2011-1.0" spirit:name="TLM2GP" spirit:library="ieee1666" spirit:vendor="accellera.org"/> <spirit:abstractionType spirit:version="2011-1.0" spirit:name="TLM2GP_tlm" spirit:library="ieee1666" spirit:vendor="accellera.org"/> <spirit:slave> <spirit:memoryMapRef spirit:memoryMapRef="RegisterMap"/> </spirit:slave> <spirit:portMaps> <spirit:portMap> <spirit:logicalPort> <spirit:name>TLMSOCKET</spirit:name> </spirit:logicalPort> <spirit:physicalPort> <spirit:name>socket</spirit:name> </spirit:physicalPort> </spirit:portMap> </spirit:portMaps> </spirit:busInterface> </spirit:busInterfaces> <spirit:memoryMaps> <spirit:memoryMap> <spirit:name>RegisterMap</spirit:name> <spirit:addressBlock> <spirit:name>Registers</spirit:name> <spirit:baseAddress spirit:resolve="immediate">0x0</spirit:baseAddress> <spirit:range spirit:resolve="immediate">0x400</spirit:range> <spirit:width spirit:resolve="immediate">32</spirit:width> <spirit:usage>register</spirit:usage> <spirit:access>read-write</spirit:access> </spirit:addressBlock> <spirit:addressUnitBits>8</spirit:addressUnitBits> </spirit:memoryMap> </spirit:memoryMaps> <spirit:model> <spirit:views> <spirit:view> <spirit:name>TLM</spirit:name> <spirit:envIdentifier>*:*:*</spirit:envIdentifier> <spirit:language>systemc</spirit:language> <spirit:modelName>tlmip</spirit:modelName> <spirit:fileSetRef> <spirit:localName>TLM</spirit:localName> </spirit:fileSetRef> </spirit:view> </spirit:views> <spirit:ports> <spirit:port> <spirit:name>socket</spirit:name> <spirit:transactional> <spirit:transTypeDef> <spirit:typeName>tlm::tlm_target_socket<32></spirit:typeName> <spirit:typeDefinition>tlm.h</spirit:typeDefinition> </spirit:transTypeDef> <spirit:service> <spirit:initiative>provides</spirit:initiative> <spirit:serviceTypeDefs> <spirit:serviceTypeDef> <spirit:typeName spirit:implicit="true">tlm_fw_transport_if</spirit:typeName> </spirit:serviceTypeDef> </spirit:serviceTypeDefs> </spirit:service> </spirit:transactional> </spirit:port> </spirit:ports> </spirit:model> <spirit:fileSets> <spirit:fileSet> <spirit:name>TLM</spirit:name> <spirit:file> <spirit:name>../SLMODEL/inc/tlmip.h</spirit:name> <spirit:fileType>systemCSource</spirit:fileType> <spirit:isIncludeFile spirit:externalDeclarations="true">true</spirit:isIncludeFile> <spirit:logicalName>tlmiplib</spirit:logicalName> </spirit:file> <spirit:file> <spirit:name>../SLMODEL/src/tlmip.cpp</spirit:name> <spirit:fileType>systemCSource</spirit:fileType> <spirit:logicalName>tlmiplib</spirit:logicalName> <spirit:dependency>../SLMODEL/inc</spirit:dependency> </spirit:file> </spirit:fileSet> </spirit:fileSets> </spirit:component>
  23. Hi Sachin, The directory structure in this document is as follows: data/<library>/<cell>/<view> where data is the root of your tree, <library> is placeholder for a collection of IPs (for instance matching with the library field in the IP-XACT VLNV), <cell> is the name of your IP (this name must be unique in your company), <view> is the name of a view (directory) of that IP that contains the implementation of that view An example for a soft IP named my_ip: data/my_lib/my_ip/RTL/my_ip.v /DOCUMENTS/my_ip.pdf /METADATA/my_ip.xml The METADATA view is the location for an IP-XACT XML file. The file my_ip.xml can contain a view named RTL referencing a fileSet named RTL. The fileSet RTL can contain a file named ../RTL/my_ip.v. This verilog file would implement the module my_ip. You can think of many other views such as NETLIST for gate-level netlist and LAYOUT for gdsii. If you would replace the prefix "my" by a unique prefix for each team in your organization, then all IP would be unique and in a unique location. Best regards, Erwin
  24. Hi Sachin, There is no way to define environment variables locally to components. You need to organize that yourself outside of IP-XACT. You may derive the names of your environment variables from the IP-XACT VLNV identifier. For instance, rather than using MY_VAR you could use <Vendor>_<Library>_<Name>_<Version>. Since the VLNV is unique, also your environment variables are unique. However, I think a better approach is to organize your directory structure such that each team in your organization works in its own sub-tree of this directory structure. Also the common files should have one location in this directory structure. An example of such a structure is the CoReUse directory structure. In this way all your paths can be relative. Best regards, Erwin
  25. Hello Sachin, In an IP-XACT file element you can use either a relative path or a path using an environment variable. For instance ${MY_VAR}/my_common_lib/my_common_file.v. In this way, the file path is independent of the location of the IP-XACT component xml file containing this file element. Best regards, Erwin