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  1. Synopsys's Mehta recognized for his significant role in Accellera's growth worldwide Elk Grove, Calif., May 31, 2016 -- Accellera Systems Initiative (Accellera), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announced today that Shrenik Mehta is the recipient of the fifth annual Accellera Leadership Award. The award recognizes Shrenik's vision, leadership and contribution to standards development, governance and promotional activities on behalf of the organization. The award will be presented at the Design Automation Conference (DAC) during the Accellera breakfast and town hall meeting on Tuesday, June 7. Read the full press release...
  2. The standard will be available as part of the Accellera-sponsored IEEE Get Program Elk Grove, Calif., May 3, 2016 — Accellera Systems Initiative (Accellera), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announced today that SystemC AMS (Analog/Mixed Signal) has been released by the IEEE Standards Association (IEEE-SA) as IEEE 1666.1™-2016. It is available for download at no charge under the Accellera-sponsored IEEE Get Program. Read the full press release...
  3. IEEE P1800.2™ working group issues Call for Participation Elk Grove, Calif., July 30, 2015 – IEEE Standards Association (IEEE-SA) and Accellera Systems Initiative (Accellera), the electronics industry organization focused on electronic design automation (EDA) and intellectual property (IP) standards, announced today that the Accellera Universal Verification Methodology (UVM) 1.2 will be submitted as a contribution to the IEEE P1800.2™ working group for further standardization and maintenance once the working group has been established at its first meeting on August 6, 2015. A Call for Participation has been distributed for the first meeting. View the full press release ...
  4. DVCon: The Imitation Game

    What if I were to tell you that I attended a conference where people were really excited to be there, where the exhibit hall was filled with a crush of people making their way from booth to booth, talking with exhibitors and exchanging business cards madly. A conference where the South of the exhibit hall was dominated by Synopsys, the East by Cadence, and the West by Mentor, and where at the happiest hour, libations and snacks flowed freely in a sub-set of the booths and the whole exhibit hall ... ... View the full article ...
  5. San Jose, Calif., March 2, 2015 - Accellera Systems Initiative (Accellera), the electronics industry organization focused on electronic design automation (EDA) and intellectual property (IP) standards, announced today that the Accellera Universal Verification Methodology (UVM) 1.2 standard is proceeding to IEEE standardization. Already proven in the electronics industry, the UVM standard will benefit from worldwide recognition and formalization, and will undergo the first step toward being ... ... View the full article ... View supporting industry quotes ...
  6. Elk Grove, Calif., February 25, 2015 -- Accellera Systems Initiative (Accellera) announced today that Justin Refice, a member of the Universal Verification Methodology Working Group (UVM WG), is the recipient of the fourth annual Accellera Technical Excellence Award. The award is being presented at the Design and Verification Conference and Exhibition (DVCon) on Monday, March 2, 2015 during the Accellera Day luncheon from 12:00-1:30pm at the DoubleTree Hotel in San Jose, California. The award ... ... View the full article ...
  7. View supporting quotes from Agnisys, Cadence, Mentor Graphics, Sonics, Synopsys, and more. View the full article ...
  8. Elk Grove, Calif., USA, February 11, 2015 - Accellera Systems Initiative (Accellera), the electronics industry organization focused on electronic design automation (EDA) and intellectual property (IP) standards, announced it has established a new working group with the charter to develop the electronic industry's first standard for portable test and stimulus. When completed and adopted, this standard will enable a single specification that will be portable from IP to full system and ... ... View the full article ...
  9. Proposed standard to specify verification intent and behaviors reusable across multiple target platforms - Published by Electronic Engineering Journa ... View the full article ...
  10. Accellera created a working group for the portable test and stimulus, which would allow engineering teams to create the test once and be able to run it throughout the flow. - Published by Semiconductor Engineerin ... View the full article ...
  11. Last week I had a chance to chat by phone with Accellera Chair Shishpal Rawat, and when I say chance that's accurate. Rawat is so busy these days, it's hard to believe he has time for any extraneous conversations. Not only does he have a full-time job at Intel, he has been chair of Accellera for four years and now is ramping up to take over the reins at CEDA at well. - Published by EDACaf ... View the full article ...
  12. New verification standard readied for submission to IEEE; 90-day public comment period begins. - Published by Semiconductor Engineerin ... View the full article ...
  13. Napa, Calif., USA, 24 June 2014 - Accellera Systems Initiative (Accellera), the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announced it released a new version of its Universal Verification Methodology (UVM) class reference document, UVM 1.2 for SoC (system on chip) verification. UVM 1.2 improves interoperability and reduces the cost of IP development and reuse for each new project. The ... ... View the full article ...
  14. San Francisco, Calif., June 3, 2014 (at the Design Automation Conference) -- Accellera Systems Initiative (Accellera), an independent non-profit organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, announces it has developed new verification and design modeling extensions for its Verilog-AMS standard. Verilog-AMS provides powerful structural and behavioral modeling capabilities for mixed-signal designs in which the ... ... View the full article ...
  15. Napa, Calif., USA, 28 May 2014 - Accellera Systems Initiative, the electronics industry organization focused on the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards, has named Accellera board member Yatin Trivedi as the recipient of its 2014 Leadership Award. The Award recognizes the vision, leadership and contribution to standards development, governance and promotional activities of the organization. The Award will be presented at the Design ... ... View the full article ...
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