UVM Simulator Specific Issues

180 topics in this forum

1. ** Error: (vsim-3601) Iteration limit reached at time 2990 ns.

   By santhoshvlsi, May 23, 2013
   • 3 replies
   • 30k views
   • 
   • ralph.goergen
   • June 21, 2013

2. Free systemverilog/uvm simulator for small amounts of code exists?

   By ljepson74, May 30, 2013   

   • simulator
   • great question
   • (and 1 more)

     Tagged with:

     • simulator
     • great question
     • free
   • 13 replies
   • 26.3k views
   • 
   • David Black
   • July 27, 2020

3. VCS reports an error when compiling the uvm_pkg.sv (last version: 1_0_EA)

   By erioha01, September 28, 2010
   • 5 replies
   • 24.2k views
   • 
   • adielkhan
   • July 15, 2011

4. How to check VCS version number?

   By ljepson74, July 22, 2016   

   • vcs
   • version
   • 3 replies
   • 22.9k views
   • 
   • Gowri Sankar
   • September 1, 2016

5. VCS MX and UVM

   By krb, April 12, 2012
   • 3 replies
   • 20.8k views
   • 
   • adielkhan
   • April 12, 2012

6. [irun *E,MSSYSTF] when using uvm-1.1a, any suggestion and thanks!

   By SeanChou, December 23, 2011
   • 18 replies
   • 19.4k views
   • 
   • sega
   • October 16, 2012

7. Compiling UVM with VCS

   By SaurabhS111, October 7, 2013
   • 3 replies
   • 18.3k views
   • 
   • adielkhan
   • October 8, 2013

8. VCS problem with SystemVerilog

   By mrforever, April 7, 2013   

   • vcs
   • complie
   • (and 1 more)

     Tagged with:

     • vcs
     • complie
     • systemverilog
   • 2 replies
   • 17.4k views
   • 
   • adielkhan
   • April 8, 2013

9. Trouble running Questasim 10.0a with simple UVM example

   By cliffc, March 6, 2011
   • 9 replies
   • 17.2k views
   • 
   • chandan
   • March 17, 2014

10. Questasim: Problem with "paused" prompt

    By chessat2002, December 14, 2012
    • 5 replies
    • 15.8k views
    • 
    • chessat2002
    • December 20, 2012

11. ERROR IN NCSIM Simulation -E,CUVMUR

    By Venkatesh, April 21, 2017
    • 1 reply
    • 14.7k views
    • 
    • kurtlin
    • April 22, 2017

12. Synopsys VCS: Compilation Error when running example from UVM1.0 package

    By Jay, November 18, 2011
    • 2 replies
    • 14.7k views
    • 
    • oliver
    • February 25, 2021

13. getting ncelab: *F,INTERR: INTERNAL EXCEPTION error when trying to run uvm1.1

    By usha, July 9, 2012
    • 4 replies
    • 14.7k views
    • 
    • uwes
    • September 21, 2012

14. Geting started error on Cadence (Multiple packages)

    By EugenueY, July 16, 2012
    • 7 replies
    • 14.7k views
    • 
    • prase
    • December 16, 2021

15. uvm-1.2 uvm_dpi.cc compile errors using questasim 10.2c

    By Roman, October 16, 2014
    • 6 replies
    • 14.6k views
    • 
    • dave_59
    • October 20, 2014

16. Cadence IPXact -> UVM_REG Register Map generator

    By anthony.winter, June 30, 2011
    • 6 replies
    • 14.3k views
    • 
    • viru_agnisys
    • December 14, 2015

17. ncsim: Unable to load the default library libdpi

    By felixsh, August 27, 2012
    • 5 replies
    • 13.8k views
    • 
    • uwes
    • July 4, 2013

18. syntax error in VCS

    By kieunguyen, November 25, 2014
    • 2 replies
    • 13.3k views
    • 
    • hbeck
    • February 2, 2015

19. Error loading design during QuestaSim simulation of VHDL Design with SystemVerilog TB

    By pratyaksharn, May 7, 2012
    • 2 replies
    • 12.8k views
    • 
    • pratyaksharn
    • May 14, 2012

20. ncsim (version 11) + UVM 1.1

    By sheffern, February 9, 2012
    • 1 reply
    • 12.8k views
    • 
    • uwes
    • February 9, 2012

21. UVM compilation issue with basic examples

    By nishanthmv, August 8, 2011
    • 2 replies
    • 12.3k views
    • 
    • nishanthmv
    • August 9, 2011

22. Connect interface to dut

    By fbochud, September 5, 2013
    • 7 replies
    • 11.9k views
    • 
    • dave_59
    • December 21, 2017

23. BKM - Using Cadence Incisive with UVM?

    By cliffc, December 12, 2012
    • 3 replies
    • 11.6k views
    • 
    • Prawin
    • September 20, 2018

24. Cadence: Incisive Enterprise Simulator vs. Incisive Unified Simulator - difference?

    By ljepson74, April 7, 2014   

    • Cadence
    • IUS
    • (and 4 more)

      Tagged with:

      • Cadence
      • IUS
      • IES
      • Incisive
      • Incisive Enterprise Simulator
      • Incisive Unified Simulator
    • 1 reply
    • 11.2k views
    • 
    • Adam Sherilog
    • May 5, 2014

25. How to do coverage in UVM

    By anubhaw2004, March 16, 2012
    • 5 replies
    • 11.2k views
    • 
    • adielkhan
    • July 31, 2012