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UVM (Pre-IEEE) Methodology and BCL Forum

Forum for posting questions about the pre-IEEE UVM library and its application to verification environments. 

944 topics in this forum

  1. UVM's m_sequencer, p_sequencer, get_sequencer() and `uvm_declare_p_sequencer

    By cliffc,
    • 8 replies
    • 42.3k views

  2. The difference between run_phase and main_phase in uvm_component

    By brxue,
    • 8 replies
    • 27.9k views

  3. Question about grab/ungrab for interrupt

    By yyn,
    • 1 reply
    • 26.1k views

  4. How to pass the value to the variable of uvm_sequence object

    By mrforever,   
    • 12 replies
    • 24.9k views

  5. What is the proper way to trigger something when a uvm_reg field is written?

    By dwikle,
    • 7 replies
    • 24.9k views

  6. seq_item_port.put_response(rsp);

    By pratta,
    • 6 replies
    • 24.7k views

  7. What 's difference between copy and clone?

    By hugemx830202,
    • 3 replies
    • 23.2k views

  8. use create() for constructor with additional arguments

    By wilsony,
    • 6 replies
    • 21k views

  9. how to pass a cmdline argument file when run simulation

    By xndwds313,
    • 11 replies
    • 19.3k views

  10. [UVM Regression] How to assign different seed of each run? (single compile)

    By SeanChou,
    • 2 replies
    • 18.7k views

  11. uvm_reg_bit_bash_seq usage..

    By kiranbhaskar,
    • 8 replies
    • 16.6k views

  12. Starting sequences on null sequencer?

    By cliffc,   
    • 8 replies
    • 15.9k views

  13. end of test methodology in uvm

    By uwes,
    • 13 replies
    • 15.6k views

  14. UVM_ALL_ON -vs- UVM_DEFAULT

    By cliffc,
    • 10 replies
    • 15.5k views

  15. How to uvm_config_db to set parameter based interface down to my env?

    By hugemx830202,
    • 9 replies
    • 15.2k views

  16. UVM Register Field Coverage

    By graeme_jessiman,
    • 8 replies
    • 14.7k views

  17. multiple items, multiple sequence, one sequencer, one driver

    By mrforever,
    • 11 replies
    • 14.7k views

  18. Using run phase and new UVM phases at the same time

    By pulzar,
    • 18 replies
    • 14.6k views

  19. Diff between OVM and UVM

    By sudheer59,
    • 9 replies
    • 14.6k views

  20. Guideline of using uvm objection

    By ranjisan,
    • 3 replies
    • 14.3k views

  21. Using +uvm_set_verbosity

    By ggorman,
    • 2 replies
    • 14.3k views

  22. Running multiple sequences on the same sequencer in parallel

    By ajustesen,
    • 2 replies
    • 14.2k views

  23. Not able to configure thru +uvm_set_config_int:

    By kamboj,
    • 9 replies
    • 13.2k views

  24. uvm_resource_db class usage

    By sankey,
    • 5 replies
    • 12.9k views

  25. `uvm_do_with is not working with variable constraint

    By sathyakiran.p,   
    • 5 replies
    • 12.8k views
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