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UVM Connect - a SystemC TLM interface for UVM/OVM - v2.2


About This File

UVM Connect is a package providing complete SystemC interop support for SystemVerilog UVM/OVM via TLM1/TLM2 to easily integrate models in either language, supports any compliant simulator, and works with both UVM and OVM.  Donated to Accellera by Mentor Graphics.

The UVM Connect package builds on existing standards: SystemVerilog, SystemC and UVM, allowing TLM models in each language to communicate with each other.  The package also includes an API that allows SystemC to interact with, and control the execution of, UVM testbenches.

With version 2.2, the UVM Connect package supports OVM as well as UVM, preserving an easy migration path for SystemC elements when the time comes to migrate from OVM the UVM.

Who would use UVM Connect?

The UVM Connect package enables a variety of use models as Verification IP developed in one language can be used by the other:

  • reuse of SystemC models as reference models in SV
  • using SystemC virtual platforms with SV RTL hardware descriptions
  • integration of off-the-shelf VIP in either language using TLM1, TLM2, and Analysis Ports
  • using SystemVerilog random stimulus or UVM sequences with a SystemC platform
How is the Connection implemented?

UVM Connect is open and standards-based.  It is implemented as a SystemVerilog package and a SystemC namespace.  These packages contain function calls that allow transactions to be passed between the two languages, using the SystemVerilog Direct Programming Interface (DPI), that enables SystemVerilog to make and accept C function calls.

The API supports:
  • one-line SV/DPI/SystemC socket connection mechanism for TLM1, TLM2 and Analysis Ports
  • easy transaction conversion support, built-in Generic Payload support
  • command API for interaction or control of the UVM testbench
Compatibility:

The UVM Connect package is compatible with any simulator, using the IEEE 1800 SystemVerilog and IEEE 1666 SystemC standards.  It has been tested by several verification teams in the industry and can accommodate various inter-language instantiation schemes.

Support, training, documentation available at Verification Academy

 




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